Document fins/I0722-1


FIN #: I0722-1

SYNOPSIS: Systems using Schizo chip for I/O may experience SERR panic on REQ64
          parity error

DATE: Sep/12/01

KEYWORDS: Systems using Schizo chip for I/O may experience SERR panic on REQ64
          parity error


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- Sun Proprietary/Confidential: Internal Use Only -
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                            FIELD INFORMATION NOTICE
                  (For Authorized Distribution by SunService)



SYNOPSIS: Systems using Schizo chip for I/O may experience SERR panic on 
          REQ64 parity error.

              
Sun Alert:          No

TOP FIN/FCO REPORT: No 
 
PRODUCT_REFERENCE:  cPCI/PCI boards

PRODUCT CATEGORY:   Display / Framebuffer


PRODUCTS AFFECTED:   
 
Mkt_ID        Platform   Model   Description               Serial Number
------        --------   -----   -----------               -------------
Systems Affected
----------------
  -           A28         ALL    Sun Blade 1000                  -
  -           A35         ALL    Sun Fire 280R                   -   
  -           S8          ALL    Sun Fire 3800                   -
  -           S12         ALL    Sun Fire 4800                   - 
  -           S12i        ALL    Sun Fire 4810                   - 
  -           S24         ALL    Sun Fire 6800                   -
  -           A30         ALL    Sun Fire V880                   -
  -           N28         ALL    Netra 20                        - 


X-Options Affected
------------------
X3668A	           -	   -     PGX32 CARD W/VIDEO ADAPTOR      -
X3768A	           -	   -     PGX64 CARD W/VIDEO ADAPTOR      -


PART NUMBERS AFFECTED: 

Part Number            Description                            Model
-----------            -----------                            -----
501-4143-15 or lower   ASSY EXCALIBUR 0 MEG TSTD                -
501-5938-07 or lower   ASSY EXCAL/LITTLENECK 0 MEG TS           -
540-4591-01            ASSY Sun Fire 3800 cPCI I/O              -
540-4616-01            ASSY Serengetti PCI/IO                   -
540-4617-03            ASSY cPCI I/O Board                      -
 

REFERENCES:

BugId: 4482600 - SERR panic on REQ64 parity error in Schizo based systems. 

       4492263 - add hook to disable long PIO.

ESC:   531757 -  Sunfire 280 HW PCI Card beta/fcs

      
PROBLEM DESCRIPTION:

If the Emulex FC HBA card is placed on the same PCI Bus with any
other PCI card which causes the Schizo chip to attempt a 64-bit PIO, a
system panic would most likely result.  The problem will not occur if
the Emulex HBA card is installed alone on a PCI Bus.

UltraSparc-III platforms utilizing the Schizo 2.1 or 2.2 ASIC may
experience panics due to address parity errors on the PCI Bus.  The
problem has been seen on the Sun Fire 280R with the Emulex FC HBA card
in combination with a PGX32 card installed on the same PCI Bus.  This
condition occurs when a card on the PCI Bus detects a 64-bit parity
address error on the PCI Bus while another card on the same PCI Bus is
performing a 64-bit PIO.

The following error messages are displayed prior to a system panic:

     WARNING: pcisch-0: PCI fault log start:
     PCI SERR
     PCI error ocurred on device #6
     dwordmask=0 bytemask=0
     PCI primary error (0):
     pcisch-0: PCI secondary error (0):
     pcisch-0: PBM AFAR 0.00000000:
     pcisch-0: PCI config space error status (4280):
     signalled system error.
     pcisch-0: PCI fault log end.
     panic[cpu1]/thread=2a10000bd40: pcisch-0: PCI bus 2 error(s)!

This problem has only been reported in one specific configuration, an
Emulex FC HBA card + PGX32 graphics card on the same bus in a Sun
Fire 280R, but theoretically can occur with other cards which use PIO.
In this particular case, the problem occurs when a device (Emulex)
performs a legal check on the 64-bit extension parity while the Schizo
chip is performing 64-bit PIO to the PGX32 board.  The Emulex board
detects an address parity error, and signals this via SERR.  This leads
to a system panic.

Engineering has determined that the parity errors and subsequent panics
are occurring because the Schizo chip does not drive the upper address
bits during the address phase of a 64-bit PIO transaction.  The address
bits default to all one's, which is incorrect parity.  The Emulex card
detects this incorrect parity and issues an SERR.  A panic follows.

There are currently two workarounds which may be used to avoid this
problem.  Please see the Corrective Action section.  

  
IMPLEMENTATION:  
 
         ---
        |   |   MANDATORY (Fully Pro-Active)
         ---    
         
  
         ---
        |   |   CONTROLLED PRO-ACTIVE (per Sun Geo Plan) 
         --- 
         
                                
         ---
        | X |   REACTIVE (As Required)
         ---
         

CORRECTIVE ACTION:     
        
The following recommendation is provided as a guideline for authorized
Enterprise Services Field Representatives who may encounter the above 
mentioned problem.

The solutions outlined below depends on the type of graphics card 
( PGX32 or PGX64 ) being installed.

Solution 1:
-----------

   If using the PGX32 graphic card, install Patch-ID#109154-10.
   

Solution 2:
-----------
            
   If using the PGX64 graphics card, 
   
   	1. Install Patch-ID#108606-18 
 	2. Create the config file: /platform/sun4u/kernel/drv/m64.conf
   	   add the following entry:   disableLongPIO=1;
   	3. At 'ok' prompt, modify OBP parameter 'output-device' using;
   	   setenv output-device screen:r1280x1024x76x24
	4. Shutdown the system, install the PGX64 card, and then reboot 
	   to install the new PGX m64 driver.     
   

COMMENTS:

None  

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Implementation Footnote:

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     the FIN. 
   
ii)  For CONTROLLED PROACTIVE FINs, Enterprise Services mission critical    
     support teams will recommend implementation of the FIN  (to their  
     respective accounts), at the convenience of the customer. 

iii) For REACTIVE FINs, Enterprise Services will implement the FIN as the   
     need arises.
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