InfoDoc ID |
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Synopsis |
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Date |
27430 |
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Sun Fire (3800-6800): Layout of memory on CPU/System boards |
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14 Aug 2001 |
Sun Fire Memory
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=================================Connector End==================================
P B D (Proc, bank, dimm)
J14600 1 0 3
J14601 1 1 3
J14500 1 0 2
J14501 ---> CPU B 1 1 2 ---> CPU P1
J14400 1 0 1
J14401 1 1 1
J14300 1 0 0
J14301 1 1 0
J13600 0 0 3
J13601 0 1 3
J13500 0 0 2
J13501 ---> CPU A 0 1 2 ---> CPU P0
J13400 0 0 1
J13401 0 1 1
J13300 0 0 0
J13301 0 1 0
J16600 3 0 3
J16601 3 1 3
J16500 3 0 2
J16501 ---> CPU D 3 1 2 ---> CPU P3
J16400 3 0 1
J16401 3 1 1
J16300 3 0 0
J16301 3 1 0
J15600 2 0 3
J15601 2 1 3
J15500 2 0 2
J15501 ---> CPU C 2 1 2 ---> CPU P2
J15400 2 0 1
J15401 2 1 1
J15300 2 0 0
J15301 2 1 0
=============================================================================
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Each cpu has 2 physical banks (1 Even & 1 Odd bank ) with 4 DIMMS each
Each physical bank has 2 logical banks
B0: Group 0 is the Even bank (Note the Even bank DIMMS end with a "0")
B1: Group 1 is the Odd bank (Note the Odd bank DIMMS end with a "1")
L0 is the front of all 4 DIMMS of the physical bank B0
L2 is the back of all 4 DIMMS of the physical bank B0
L1 is the front of all 4 DIMMS of the physical bank B1
L3 is the back of all 4 DIMMS of the physical bank B1
INTERNAL SUMMARY:
Transferred from sunsolve.france, "French Documents" collection.
DOCUMENT ID : 1190
SYNOPSIS : Serengeti:layout of memory on CPU/System boards
SUBMITTER : lboschet@france
CREATION DATE : 26/03/01
LAST MODIFIER :
LAST MODIFICATION DATE :
SUBMITTER: SSE
APPLIES TO: Hardware/Sun Fire
ATTACHMENTS:
Copyright (c) 1997-2003 Sun Microsystems, Inc.