TDA1675A

VERTICAL DEFLECTION CIRCUIT

Document Number:          1192
Date Update:              1/9/93
Pages:                    11

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VERTICAL DEFLECTION CIRCUIT
September 1993
.
SYNCHRONISATION CIRCUIT
.
ESD PROTECTED
.
PRECISION OSCILLATOR AND RAMP
GENERATOR
.
POWER OUTPUT AMPLIFIER WITH HIGH
CURRENT CAPABILITY
.
FLYBACK GENERATOR
.
VOLTAGE REGULATOR
.
PRECISION BLANKING PULSE GENERATOR
.
THERMAL SHUT DOWN PROTECTION
.
CRT SCREEN PROTECTION CIRCUIT
WHICH BLANKS THE BEAM CURRENT IN
THE EVENT OF LOSS OF VERTICAL DE-
FLECTION CURRENT
TDA1675A
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
Tab connected to Pin 8
FLYBACK
SUPPLY
BLANKING OUTPUT
AMPLIFIER INPUT (-)
AMPLIFIER INPUT (+)
RAMP OUTPUT
RAMP GENERATOR
GROUND
HEIGHT ADJUSTMENT
OSCILLATOR
SYNC. INPUT
OSCILLATOR
OSCILLATOR
AMPLIFIER SUPPLY
AMPLIFIER OUTPUT
1675A-01.EPS
PIN CONNECTIONS
(top view)
MULTIWATT 15
(Plastic Package)
ORDER CODE : TDA1675A
DESCRIPTION
The TDA1675A is a monolithic integrated circuit in
15-lead Multiwatt
[
package. It is a full performance
and very efficient vertical deflection circuit intended
for direct drive of the yoke of 110
o
colour TV picture
tubes. It offers a wide range of applications also in
portable CTVs, B&W TVs, monitors and displays.
1/11
14
+
SYNC.
FLYBACK
GENERATOR
R3
POWER
AMP.
+
-
CLOCK
PULSE
R1 R2
13 2
+
1
11
15
C
f
+V
S
12
R
e
R
a
YOKE
R
c
C
c
+
+
R
f
8 9 10
C
a
C
b
R
d
7
HEIGHT
C
o
7
3
4
6
BLANKING
OUT
R
o
SYNC.
LIN
R
b
Ly
Ry
Iy
OSCILLATOR
VOLTAGE
REGULATOR
BLANK
GENERATOR
AND CRT
PROTECTION
RAMP
GENERATOR
BUFFER
STAGE
THERMAL
PROTECTION
1675A-02.EPS
BLOCK DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
V
S
Supply Voltage at Pin 14 35 V
V
1
, V
2
Flyback Peak Voltage 65 V
V
5
Sync. Input Voltage 20 V
V
11
, V
12
Power Amplifier Input Voltage V
S
- 10 V
V
13
Voltage at Pin 13 V
S
I
O
Output Current (non repetitive) at t = 2ms 3 A
I
O
Output Peak Current at f = 50Hz t > 10
m
s 2 A
I
O
Output Peak Current at f = 50Hz t
3
10
m
s 3.5 A
I
15
Pin 15 Peak-to-peak Flyback Current at f = 50Hz, tfly
3
1.5ms 3 A
I
15
Pin 15 D.C. Current at V1 < V
14
100 mA
P
tot
Maximum Power Dissipation at T
case
3 
60
o
C 30 W
T
stg
, T
j
Storage and Junction Temperature - 40, + 150
o
C
1675A-01.TBL
THERMAL DATA
Symbol Parameter Value Unit
R
TH(j-c)
Thermal Resistance Junction-case Max. 3
o
C/W
R
TH(j-a)
Thermal Resistance Junction-ambient
Max. 40
o
C/W
1675A-02.TBL
TDA1675A
2/11
DC ELECTRICAL CHARACTERISTICS
(V
S
= 35V, T
amb
= 25
o
C, unless otherwise specified)
Symbol Parameter Test conditions Min. Typ. Max. Unit Fig.
I
2
Pin 2 quiescent current I
1
= 0 16 36 mA 1b
- I
9
Ramp generator bias current V
9
= 0 0.02 1
m
A 1b
- I
9
Ramp generator current V
9
= 0 ; - I
7
= 20
m
A 18.5 20 21.5
m
A 1b
S
D
I
9
S
I
9
Ramp generator non linearity
D
V
9
= 0 to 15V, - I
7
= 20
m
A 0.2 1 % 1b
I
14
Pin 14 quiescent current 25 45 mA 1b
V
1
Quiescent output voltage V
S
= 35V, R
a
= 2.2k
W
, R
b
= 1k
W
V
S
= 15V, R
a
= 390
W
, R
b
= 1k
W
16.4
6.9
17.8
7.5
19.5
8.1
V
V
1a
V
1L
Output saturation voltage to ground I
1
= 1.2A, 1 1.4 V 1c
V
1H
Output saturation voltage to supply - I
1
= 1.2A 1.6 2.2 V 1d
V
4
Oscillator virtual ground 0.45 V 1b
V
7
Regulated voltage at pin 7 - I
7
= 20
m
A 6.3 6.6 7 V 1b
D
V
7
D
V
S
Regulated voltage drift with supply
voltage
D
V
S
= 15 to 35V 1 2
mV
V
1b
V
11
Amplifier input (+) reference voltage 4.1 4.4 4.7 V 1b
V
13
Blanking output saturation voltage I
13
= 10 mA 0.35 0.5 V 1a
V
15
Pin 15 saturation voltage to ground I
15
= 20 mA 1 1.5 V 1a
1675A-03.TBL
Figure 1 :
DC Test Circuit.
22k
W
12
1
2
9 7 8 10
V
S
I
14
V
11
47k
W
-I
7
V
-I
9
5
3
75k W
I
1
11
I
2
+ I
1
9
4
B
1V
V
4
A
4
V
7
14
1675A-04.EPS
Figure 1b
1
2
11 8
4
1V
12 5
8V
0.1mF
10
V
S
V
1L
+I
1
14
1675A-05.EPS
Figure 1c
1
2
11 8
4
1V
14
12 5
8V
0.1mF
10
V
S
V
1H
-I
1
1675A-06.EPS
Figure 1d
R
a
7
12
13 14 15
1
2
4
5 9 11 8 10
0.1mF
I
13
V
S
I
15
V
15
V
13
V
1
R
b
-I
9
1V
8V
1675A-03.EPS
Figure 1a
TDA1675A
3/11
AC ELECTRICAL CHARACTERISTICS
(Refer to A.C. test circuit of fig. 2, T
amb
= 25
o
C, V
S
= 24V, f = 50Hz, unless otherwise specified)
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
S
Supply Current I
Y
= 2A
PP
295 mA
I
5
Sync Input Current Required to Sync 100
m
A
V
1
Flyback Voltage I
y
= 2App 50 V
V
3
Peak-to-peak Oscillator Sawtooth
Voltage
I
5
= 0
I
5
= 100
m
A
3.6
3.4
V
V
V
10TH(L)
Start Scan Level of the Input Ramp 1.85 V
t
FLY
Flyback Time Iy = 2App 0.6 ms
t
BLANK
Blanking Pulse Duration f
o
= 50Hz, T
j
= 75
o
C
f
o
= 60Hz, T
j
= 75
o
C
1.33 1.4
1.17
1.47 ms
ms
f
o
Free Running Frequency R
o
= 7.5k
W
, C
o
= 330nF, T
j
= 75
o
C
R
o
= 6.2k
W
, C
o
= 330nF, T
j
= 75
o
C
42 43.5
52.5
46 Hz
Hz
D
f Synchronization Range I
5
= 100
m
A, T
j
= 75
o
C 14 16 Hz
T
j
Junction Temperature for Thermal
Shut-down
145
o
C
V
ON
Peak-to-peak Output Noise 35 mV
PP
1675A-04.TBL
2.2
W
0.22mF
270
W
YOKE
10mH
120
W
47mF
2200mF
R
f
1
2
13 14 15
12
7 8 9 10 11
100k
W
56k
W
560k
W
180k
W
220k W
HEIGHT
4
6
3
S2
SERVICE
SWITCH
15k
W
5
BLANKING
OUT
SYNC. IN
1000mF
0.1mF
+V
S
2.4k W
1N4001 220mF
TDA 1675A
2.4k
W
1k
W
LINEARITY
0.1mF
C
o
7
.5k
W
0
.33mF
0.1mF
0.1mF
I
Y
5.9
W
A
4.7k
W
B
4.7k
W
(FREQ.)
t
blank
100mA
t
sync.
V
10
V
10thL
1/fo
GND
R
f
1/fo
I
y
V
3
1/fo
t
blank
S1 (R )
o
0.82
W
V
1
1/fo
GND
t
f
I
y
1675A-07.EPS
Figure 2 :
AC Test Circuit
TDA1675A
4/11
TYPICAL PERFORMANCE
Symbol Parameter Value Unit
V
S
Minimum supply voltage 25 V
I
S
Supply current 140 mA
t
FLY
Flyback time 0.7 ms
t
BLKG
Banking time 1.4 ms
f
O
Free running frequency 43.5 Hz
* P
TOT
Power dissipation 2.4 W
* R
TH(heatsink)
Thermal resistance of the heatsink
for T
amb
= 60
o
C and T
j max
= 110
o
C
for T
amb
= 60
o
C and T
j max
= 120
o
C
13
16
o
C/W
o
C/W
* Worst case condition.
1675A-05.TBL
R9
2.2 W
C7 0.22mF
R11
330 W
YOKE
R8
120
W
C8
47mF
10V
C9
1000mF
25V
R10
2%
R12
2.2
W
5%
*
R1
4.7k
W
1
2
13 14 15
12
7 8 9 10 11
100k
W
56k
W
R6
R5
390k W
*
*
*
R4
150k W
RT1
HEIGHT
100k
W
4
6
3
S1
SERVICE
SWITCH
R2
15k
W
5
0.1mF
C1
BLANKING
OUT
SYNC.
PULSE
IN
C2
35V
470mF
C3
0.1mF
R3
10k
W
1N4001
D1
220mF - 35V
C4
TDA 1675A
2.4k
W
R7
910 W
2%
LINEARITY
RT2
C5 0.1mF
C
o
7.5k
W
1%
R
o
330nF
5%
C6
0.1mF
0.1mF
+V
S
1675A-08.EPS
* The value depends on the characteristics of the CRT. The value shown is indicative only.
Figure 3 :
Application Circuit for Small Scree 90
o
CTV Set (R
y
= 15
W
; L
y
= 30 mH ; I
y
= 0.82 A
PP
)
TDA1675A
5/11
TYPICAL PERFORMANCE
Symbol Parameter Value Unit
V
S
Minimum supply voltage 22.5 V
I
S
Supply current 185 mA
t
FLY
Flyback time 1 ms
t
BLKG
Banking time 1.4 ms
f
O
Free running frequency 43.5 Hz
* P
TOT
Power dissipation 2.7 W
* R
TH(heatsink)
Thermal resistance of the heatsink
for Tamb = 60
o
C and T
j max
= 110
o
C
for T
amb
= 60
o
C and T
j max
= 120
o
C
11.5
14.5
o
C/W
o
C/W
* Worst case condition.
1675A-06.TBL
R9
2.2 W
C7 0.22mF
R11
330 W
YOKE
R8
120
W
C8
47mF
10V
C9
1500mF
16V
R10
2%
R12
1.2
W
5%
*
R1
4.7k W
1
2
13 14 15
12
7 8 9 10 11
100k
W
56k
W
R6
R5
470k
W
*
*
*
R4
180k W
RT1
HEIGHT
220k W
4
6
3
S1
SERVICE
SWITCH
R2
15k W
5
0.1mF
C1
BLANKING
OUT
SYNC.
PULSE
IN
C2
35V
470mF
C3
0.1mF
R3
10k
W
1N4001
D1
220mF - 25V
C4
TDA 1675A
2.4k
W
R7
1.2k W
2%
LINEARITY
RT2
C5 0.1mF
C
o
7.5k W
1%
R
o
330nF
5%
C6
0.1mF
0.1mF
+V
S
1675A-09.EPS
* The value depends on the characteristics of the CRT. The value shown is indicative only.
Figure 4 :
Application Circuit for 110
o
CTV Set (R
y
= 9.6
W
; L
y
= 24.6 mH ; I
y
= 1.2 A
PP
)
TDA1675A
6/11
TYPICAL PERFORMANCE
Symbol Parameter Value Unit
V
S
Minimum supply voltage 24 V
I
S
Supply current 285 mA
t
FLY
Flyback time 0.6 ms
t
BLKG
Banking time 1.4 ms
f
O
Free running frequency 43.5 Hz
* P
TOT
Power dissipation 4.3 W
* R
TH(heatsink)
Thermal resistance of the heatsink
for Tamb = 60
o
C and T
j max
= 110
o
C
for T
amb
= 60
o
C and T
j max
= 120
o
C
6.5
8.5
o
C/W
o
C/W
* Worst case condition.
1675A-07.TBL
R9
2.2 W
C7 0.22mF
R11
330 W
YOKE
R8
120
W
C8
47mF
10V
C9
2200mF
16V
R10
2%
R12
0.82
W
5%
*
R1
4.7k W
1
2
13 14 15
12
7 8 9 10 11
100k
W
56k
W
R6
R5
560k W
*
*
*
R4
180k W
RT1
HEIGHT
220k W
4
6
3
S1
SERVICE
SWITCH
R2
15k W
5
0.1mF
C1
BLANKING
OUT
SYNC.
PULSE
IN
C2
35V
1000mF
C3
0.1mF
R3
10k
W
1N4001
D1
220mF - 25V
C4
TDA 1675A
2.4k
W
R7
1k W
2%
LINEARITY
RT2
C5 0.1mF
C
o
7.5k W
1%
R
o
330nF
5%
C6
0.1mF
0.1mF
+V
S
1675A-10.EPS
* The value depends on the characteristics of the CRT. The value shown is indicative only.
Figure 5 :
Application Circuit for 110
o
CTV Set (R
y
= 5.9
W
; L
y
= 10 mH ; I
y
= 1.95 A
PP
)
TDA1675A
7/11
S1
R
o
C
o
R
2
RT1
C4
R9
C6
R1
D1
C5
C7
C1
R6
R7
C9
R8
R12
R11
R10
C8
C2
R5 RT2
C11
R3
C3
R4
TDA 1675A
YOKE
GND SYNC.
IN
Iy
TEST
BLANK
OUT
GND
V
S
1675A-11.EPS
Figure 6 :
PC Board and Components Layout for the Application Circuits of Figures 3, 4 and 5 (1 : 1 scale)
APPLICATION INFORMATION
(Refer to the
block diagram)
Oscillator and sync gate
(Clock generation)
The oscillator is obtained by means of an integrator
driven by a two threshold circuit that switches R
o
high or low so allowing the charge or the discharge
of C
o
under constant current conditions.
The Sync input pulse at the Sync gate lowers the
level of the upper threshold and than it controls the
period duration. A clock pulse is generated.
Pin 4
is the inverting input of the amplifier used
as integrator.
Pin 6
is the output of the switch driven by the
internal clock pulse generated by the
threshold circuits.
Pin 3
is the output of the amplifier.
Pin 5
is the input for sync pulses (positive)
Ramp generator and buffer stage
A current mirror, the current intensity of which can
be externally adjusted, charges one capacitor
producing a linear voltage ramp.
The internal clock pulse stops the increasing ramp
by a very fast discharge of the capacitor a new
voltage ramp is immediately allowed.
TDA1675A
8/11
The required value of the capacitance is obtained
by means of the series of two capacitors Ca and
Cb, which allow the linearity control by applying a
feedback between the output of the buffer and the
tapping from C
a
and C
b
.
Pin 7
The resistance between pin 7 and ground
defines the current mirror current and
than the height of the scanning.
Pin 9
is the output of the current mirror that
charges the series of C
a
and C
b
. This
pin is also the input of the buffer stage.
Pin 10
is the output of the buffer stage and it is
internally coupled to the inverting input
of the power amplifier through R1.
Power amplifier
This amplifier is a voltage-to-current power
converter, the transconductance of which is
externally defined by means of a negative current
feedback.
The output stage of the power amplifier is supplied
by the main supply during the trace period, and by
the flyback generator circuit during the most of the
duration of the flyback time. The internal clock turns
off the lower power output stage to start the flyback.
The power output stage is thermally protected by
sensing the junction temperature and then by
putting off the current sources of the power stage.
Pin 12
is the inverting input of the amplifier.
An external network, R
a
and R
b
, defines
the DClevel across C
y
so allowing a cor-
rect centering of the output voltage. The
series network R
c
and C
c
, in conjunction
with R
a
and
R
b
, applies at the feedback
input I
2
a small part of the parabola,
available across C
y
, and AC feedback
voltage, taken across R
f
. The external
components R
c
, R
a
and R
d
, produce the
linearity correction on the output scan-
ning currentIy and their values must be
optimized for each type of CRT.
Pin 11
is the non-inverting input. At this pin the
non-inverting input reference voltage
supplied by the voltage regulator can be
measured. A capacitor must be con-
nected to increase the performances
from the noise point of view.
Pin 1
is the output of the power amplifier and it
drives the yoke by a negative slope cur-
rent ramply. R
e
and the Boucherot cell
are used to stabilize the power amplifier.
Pin 2
The supply of the power output stage is
forced at this pin. During the trace time
the supply voltage is obtained from the
main supply voltage V
S
by a diode,
while during the retrace time this pin is
supplied from the flyback generator.
Flyback generator
This circuit supplies both the power amplifier output
stage and the yoke during the most of the duration
of the flyback time (retrace).
The internal clock opens the loop of the amplifier
and lets pin 1 floating so allowing the rising of the
flyback. Crossing the main supply voltage at pin 14,
the flyback pulse front end drives the flyback
generator in such a way allowing its output to reach
and overcome the main supply voltage, starting
from a low condition forced during the trace period.
An integrated diode stops the rising of this output
increase and the voltage jump is transferred by
means of capacitor C
f
at the supply voltage pin of
the power stage (pin 2).
When the current across the yoke changes its
direction, the output of the flyback generator falls
down to the main supply voltage and it is stopped
by means of the saturated output darlington at a
high level. At this time the flyback generator starts
to supply the power output amplifier output stage
by a diode inside the device. The flyback generator
supplies the yoke too.
Later, the increasing flyback current reaches the
peak value and then the flyback time is completed:
the trace period restarts. The output of the power
amplifier (pin 1) falls under the main supply voltage
and the output of the flyback generator is driven for
a low state so allowing the flyback capacitor Cf to
restore the energy lost during the retrace.
Pin 15
is the output of the flyback generator that,
when driven, jumps from low to high
condition. An external capacitor C
f
trans-
fers the jump to pin 2 (see pin 2).
Blanking generator and CRT protection
This circuit is a pulse shaper and its output goes
high during the blanking period or for CRT
protection. The input is internally driven by the clock
pulse that defines the width of the blanking time
TDA1675A
9/11
2
0.5
1
1.5
0 0.5 1 1.5 2
V
1H
(V)
V
S
= 35V
I
Y
(App)
1675A-13.EPS
Figure 8 :
Output Saturation Voltage to Supply
versus Output Peak Current
when a flyback pulse has been generated. If the
flyback pulse is absent (short cirucit or open cirucit
of the yoke), the blanking output remains high so
allowing the CRT protection.
Pin 13
is an open collector output where the
blanking pulse is available.
Voltage regulator
The main supply voltage V
S
, is lowered and
regulated internally to allow the required reference
voltages for all the above described blocks.
Pin 14
is the main supply voltage input V
S
(positive).
Pin 8
is the GND pin or the negative input of V
S
0.5
1
1.5
0.5 1 1.5 2 0
V
S
= 35V
I
Y
(App)
V
1L
(V)
1675A-12.EPS
Figure 7 :
Output Saturation Voltage to Ground
vs. Peak Output Current
32
0
16
24
8
-50 50 150 100 0
T
amb
(5C)
R
t
h
=
8
5
C
/
W
R
t
h
=
4
5
C
/
W
R
t
h
=
2
5
C
/
W
I
N
F
I
N
I
T
E
H
E
A
T
S
I
N
K
P
tot
(W)
1675A-14.EPS
Figure 9 :
Maximum allowable Power Dissipation
vs. Ambient Temperature
1675A-15.IMG
Figure 10 :
Mounting Examples
MOUNTING INSTRUCTIONS
The power dissipated in the circuit must be
removed by adding an external heatsink. Thanks
to the MULTIWATT [ package attaching the
heatsink is very simple, a screw or a compression
spring (clip) being sufficient. Between the heatsink
and the package, it is better to insert a layer of
silicon grease, to optimize the thermal contact; no
electrical isolation is needed between the two
surfaces.
TDA1675A
10/11
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility
for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result
from its use. No licence is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics.
Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all
information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical components in life
support devices or systems without express written approval of SGS-THOMSON Microelectronics.
{ 1994 SGS-THOMSON Microelectronics - All Rights Reserved
Purchase of I
2
C Components of SGS-THOMSON Microelectronics, conveys a license under the Philips
I
2
C Patent. Rights to use these components in a I
2
C system, is granted provided that the system conforms to
the I
2
C Standard Specifications as defined by Philips.
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PMMUL15V.EPS
PACKAGE MECHANICAL DATA :
15 PINS - PLASTIC MULTIWATT
Dimensions
Millimeters Inches
Min. Typ. Max. Min. Typ. Max.
A 5 0.197
B 2.65 0.104
C 1.6 0.063
D 1 0.039
E 0.49 0.55 0.019 0.022
F 0.66 0.75 0.026 0.030
G 1.14 1.27 1.4 0.045 0.050 0.055
G1 17.57 17.78 17.91 0.692 0.700 0.705
H1 19.6 0.772
H2 20.2 0.795
L 22.1 22.6 0.870 0.890
L1 22 22.5 0.866 0.886
L2 17.65 18.1 0.695 0.713
L3 17.25 17.5 17.75 0.679 0.689 0.699
L4 10.3 10.7 10.9 0.406 0.421 0.429
L7 2.65 2.9 0.104 0.114
M 4.2 4.3 4.6 0.165 0.169 0.181
M1 4.5 5.08 5.3 0.177 0.200 0.209
S 1.9 2.6 0.075 0.102
S1 1.9 2.6 0.075 0.102
Dia. 1 3.65 3.85 0.144 0.152
MUL15V.TBL
TDA1675A
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