SPARCcenter 2000
| 501-1866 |
0MB FRU
w/o SPARC Module |
Notes
- FAB 270-1866-03 uses a fuse at F0200 and F0300.
- FAB 270-1866-04 uses a PTC at F0200 and F0300.
- System Board 501-1866-xx can only access 1MB of cache.
| 501-2334 |
0MB FRU
w/o SPARC Module
|
Jumper Settings
| JUMPER |
PINS |
SETTING |
DESCRIPTION |
J1400
J1401
J1400
J1401 |
1-2
1-2
2-3
2-3 |
Out
Out
In
In |
RS-423
RS-423
RS-232 +12V (default)
RS-232 -12V (default) |
| J1501 |
1-2
2-3 |
Out
In |
Factory use only
Factory setting |
|
Backplane Guide Pins
Remove two screws from the System Board XDbus connectors before installing
the system board in backplanes with guide pins. Guide pins were added to the
backplane in December 1993
by ECO WO_05425
.
Notes
- The minimum operating system is Solaris 2.2.
- Solaris 2.2 supports 5 system boards.
- Solaris 2.2 supports 8 SuperSPARC modules on 4 system boards.
- Solaris 2.3 supports 20 SuperSPARC modules on 10 system boards.
- Install the highest level Boot PROM set in System Board 0.
- Use SPARC module and SBus board Standoff 330-1664-01.
- A root partition >2GB is not supported by Sun-4c, 4m, or 4d systems.
Memory Configuration Notes
- The minimum memory configuration is 8 SIMMs in Group 0.
- Install all Group 0 SIMMs on all system boards from the lowest board slot
number to the highest. Then install SIMMs in Group 1 on all system boards. Refer
to the Memory Module Installation Guide for installation performance
guidelines.
- Use 8MB SIMM 501-1817 and 32MB SIMM 501-2196.
References
SPARCcenter 2000 Installation Manual, 800-6975.
-
SPARCcenter 2000 System Board Manual, 800-6993.
-
Memory Module (SIMM) Product Note, 801-5345.
-
Memory Module Installation Guide, 801-2030.
- BugID 4035259 filed against root partition >2GB.
SC2000 Configured System Boards
PART
NUMBER |
MAIN
MEMORY |
SIMM
SIZE |
NV
MEMORY |
NVSIMM
SIZE |
SPARC
MODULE |
| 501-2208 |
128MB |
8MB |
- |
- |
2 SM41 |
| 501-2209 |
64MB |
8MB |
- |
- |
2 SM41 |
| 501-2221 |
128MB |
8MB |
- |
- |
- |
| 501-2223 |
0MB |
- |
- |
- |
2 SM51 |
| 501-2296 |
64MB |
8MB |
8MB |
1MB |
2 SM41 |
| 501-2321 |
256MB |
32MB |
- |
- |
2 SM41 |
| 501-2322 |
256MB |
32MB |
8MB |
1MB |
2 SM41 |
| 501-2323 |
512MB |
32MB |
- |
- |
2 SM41 |
| 501-2437 |
128MB |
8MB |
- |
- |
2 SM51-2 |
| 501-2438 |
64MB |
8MB |
- |
- |
2 SM51-2 |
| 501-2439 |
512MB |
32MB |
- |
- |
- |
| 501-2448 |
64MB |
8MB |
- |
- |
- |
| 501-2720 |
0MB |
- |
- |
- |
2 SM61-2 |
| 501-2721 |
128MB |
8MB |
- |
- |
2 SM61-2 |
| 501-2722 |
256MB |
32MB |
- |
- |
2 SM61-2 |
40MHz Control Board
SPARCcenter 2000
| 501-1671 |
501-2335 |
501-2406 |
| Programmed |
Programmed |
Unprogrammed |
LED Description
| LED |
SIGNAL |
DESCRIPTION |
COLOR |
| SP |
SVP |
Service processor attached |
Yellow |
| RS |
RST |
System reset |
Yellow |
| S0 |
STP0 |
Stop request from CARB0 ASIC |
Yellow |
| S1 |
STP1 |
Stop request from CARB1 ASIC |
Yellow |
| VB |
Vbb |
-12 Volts DC status OK |
Green |
| VD |
Vdd |
+12 Volts DC status OK |
Green |
| VT |
Vtt |
+1.2 Volts DC status OK |
Green |
| VC |
Vcc |
+5 Volts DC status OK |
Green |
Notes
- The 40MHz Control Board is not compatible with the SC2000E System Board.
- The HOSTID and Ethernet Address are programmed into a 2KB × 8-bit
Flash EEPROM in the TMS29F816 at U0203. The TMS29F816 is not field replaceable.
- The HOSTID and Ethernet Address are downloaded from the control board to
the NVRAM on all system boards during POST.
- If the control board EEPROM content is invalid, the values stored in the
NVRAM on System Board 0 are used.
- The Yellow LED on the keyswitch interface board is ON if the control board
EEPROM content is invalid.
- Use the update-system-idprom OBP command to download the contents
of the NVRAM on System Board 0 to a control board with an invalid EEPROM. OBP
2.11 is required.
- Use the following command sequence to invalidate the control board EEPROM:
- ok patch noop call update-system-idprom
- ok patch noop call update-system-idprom
- ok patch call noop update-system-idprom
Power the system off and remove the Control Board.
- Use the following commands to change the NVRAM parameter that defines the
location of the master system board:
- ok clear-master-nvram
- ok reset
- The 501-1671-04 has a 66MHz clock for the early production units with 33MHz
SuperSPARC modules.
Reference
-
SPARCcenter 2000 Service Manual, 801-2007.
|
