SPARCcenter 2000E
| 501-2718 |
0MB FRU
w/o SPARC Module |
Jumper Settings
| JUMPER |
PINS |
SETTING |
DESCRIPTION |
J1200
J1201
J1200
J1201 |
1-2
1-2
2-3
2-3 |
Out
Out
In
In |
RS-423
RS-423
RS-232 +12V (default)
RS-232 -12V (default) |
| J1501 |
1-2
2-3 |
Out
In |
Factory use only
Factory setting |
|
Configured System Boards
| PART# |
MEMORY |
SIMM |
MODULE |
| 501-2672 |
256MB |
32MB |
2 SM61-2 |
| 501-2719 |
0MB |
- |
2 SM61-2 |
| 501-2723 |
128MB |
8MB |
2 SM61-2 |
| 501-2999 |
0MB |
- |
2 SM81-2 |
| 501-3034 |
256MB |
32MB |
2 SM81-2 |
| 501-3035 |
256MB |
32MB |
2 SM81-2
|
| 501-3036 |
128MB |
8MB |
2 SM81-2 |
| 501-3037 |
512MB |
32MB |
2 SM81-2 |
Notes
- The minimum operating system is Solaris 2.3.
- Solaris 2.3 supports 20 SuperSPARC modules on 10 system boards.
- The SM81-2 requires Solaris 2.4 and Patch
>=
 101945-35.
- Boot PROMs >=2.18 disable 40MHz System Boards if they are installed in
systems using the 50MHz Control Board.
- Install the highest level Boot PROM set in System Board 0.
- Use SPARC module and SBus board Standoff 330-1664-01.
- A root partition >2GB is not supported by Sun-4c, 4m, or 4d systems.
Memory Configuration Notes
- The minimum memory configuration is 8 SIMMs in Group 0.
- Use 8MB SIMM 501-1817 and 32MB SIMM 501-2196.
- Install all Group 0 SIMMs on all system boards from the lowest board slot
number to the highest. Then install SIMMs in Group 1 on all system boards,
followed by Group 2 and Group 3. Refer to the Memory Module Installation
Guide for performance guidelines.
References
-
SPARCcenter 2000 Installation Manual, 800-6975.
-
SPARCcenter 2000 System Board Manual, 800-6993.
- BugID 4035259 filed against root partition >2GB.
50MHz Control Board
SPARCcenter 2000E
| 501-2666 |
501-2674 |
| Programmed |
Unprogrammed |
LED Description
| LED |
SIGNAL |
DESCRIPTION |
COLOR |
| SP |
SVP |
Service processor attached |
Yellow |
| RS |
RST |
System reset |
Yellow |
| S0 |
STP0 |
Stop request from CARB0 ASIC |
Yellow |
| S1 |
STP1 |
Stop request from CARB1 ASIC |
Yellow |
| VB |
Vbb |
-12 Volts DC status OK |
Green |
| VD |
Vdd |
+12 Volts DC status OK |
Green |
| VT |
Vtt |
+1.2 Volts DC status OK |
Green |
| VC |
Vcc |
+5 Volts DC status OK |
Green |
Notes
- The 50MHz Control Board is not compatible with the SC2000 System Board and
SuperSPARC modules that run at 40MHz on the XDBus.
- Boot PROMs >=2.18 disable 40MHz System Boards if they are installed in
systems using the 50MHz Control Board.
- The HOSTID and Ethernet Address are programmed into a 2KB × 8-bit
Flash EEPROM in the TMS29F816 at U0203. The TMS29F816 is not field replaceable.
- The HOSTID and Ethernet Address are downloaded from the control board to
the NVRAM on all system boards during POST.
- If the control board EEPROM content is invalid, the values stored in the
NVRAM on System Board 0 are used.
- The Yellow LED on the keyswitch interface board is ON if the control board
EEPROM content is invalid.
- Use the update-system-idprom OBP command to download the contents
of the NVRAM on System Board 0 to a control board with an invalid EEPROM. OBP
2.11 is required.
- Use the following command sequence to invalidate the control board EEPROM:
- ok patch noop call update-system-idprom
- ok patch noop call update-system-idprom
- ok patch call noop update-system-idprom
Power the system off and remove the Control Board.
- Use the following commands to change the NVRAM parameter that defines the
location of the master system board:
- ok clear-master-nvram
- ok reset
Reference
-
SPARCcenter 2000 Service Manual, 801-2007.
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